Before this commit, each simulation engine (which is only pysim at
the moment, but also cxxsim soon) was a subclass of SimulatorCore,
and every simulation engine module would essentially duplicate
the complete structure of a simulator, with code partially shared.
This was a really bad idea: it was inconvenient to use, with
downstream code having to branch between e.g. PySettle and CxxSettle;
it had no well-defined external interface; it had multiple virtually
identical entry points; and it had no separation between simulation
algorithms and glue code.
This commit completely rearranges simulation code.
1. sim._base defines internal simulation interfaces. The clarity of
these internal interfaces is important because simulation
engines mix and match components to provide a consistent API
regardless of the chosen engine.
2. sim.core defines the external simulation interface: the commands
and the simulator facade. The facade provides a single entry
point and, when possible, validates or lowers user input.
It also imports built-in simulation engines by their symbolic
name, avoiding eager imports of pyvcd or ctypes.
3. sim.xxxsim (currently, only sim.pysim) defines the simulator
implementation: time and state management, process scheduling,
and waveform dumping.
The new simulator structure has none of the downsides of the old one.
See #324.
210 lines
6.7 KiB
Python
210 lines
6.7 KiB
Python
from nmigen.hdl import *
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from nmigen.hdl.rec import *
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from nmigen.sim import *
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from nmigen.lib.io import *
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from .utils import *
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class PinLayoutTestCase(FHDLTestCase):
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def assertLayoutEqual(self, layout, expected):
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casted_layout = {}
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for name, (shape, dir) in layout.items():
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casted_layout[name] = (Shape.cast(shape), dir)
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self.assertEqual(casted_layout, expected)
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class PinLayoutCombTestCase(PinLayoutTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i")
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self.assertLayoutEqual(layout_1.fields, {
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"i": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i")
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self.assertLayoutEqual(layout_2.fields, {
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"i": ((2, False), DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o")
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self.assertLayoutEqual(layout_1.fields, {
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"o": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o")
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self.assertLayoutEqual(layout_2.fields, {
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"o": ((2, False), DIR_NONE),
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})
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def test_pin_layout_oe(self):
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layout_1 = pin_layout(1, dir="oe")
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self.assertLayoutEqual(layout_1.fields, {
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="oe")
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self.assertLayoutEqual(layout_2.fields, {
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io")
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self.assertLayoutEqual(layout_1.fields, {
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"i": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io")
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self.assertLayoutEqual(layout_2.fields, {
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"i": ((2, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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class PinLayoutSDRTestCase(PinLayoutTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i", xdr=1)
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self.assertLayoutEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i", xdr=1)
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self.assertLayoutEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((2, False), DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o", xdr=1)
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self.assertLayoutEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o", xdr=1)
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self.assertLayoutEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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})
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def test_pin_layout_oe(self):
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layout_1 = pin_layout(1, dir="oe", xdr=1)
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self.assertLayoutEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="oe", xdr=1)
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self.assertLayoutEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io", xdr=1)
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self.assertLayoutEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((1, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io", xdr=1)
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self.assertLayoutEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i": ((2, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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class PinLayoutDDRTestCase(PinLayoutTestCase):
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def test_pin_layout_i(self):
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layout_1 = pin_layout(1, dir="i", xdr=2)
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self.assertLayoutEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((1, False), DIR_NONE),
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"i1": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="i", xdr=2)
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self.assertLayoutEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((2, False), DIR_NONE),
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"i1": ((2, False), DIR_NONE),
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})
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def test_pin_layout_o(self):
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layout_1 = pin_layout(1, dir="o", xdr=2)
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self.assertLayoutEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((1, False), DIR_NONE),
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"o1": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="o", xdr=2)
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self.assertLayoutEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((2, False), DIR_NONE),
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"o1": ((2, False), DIR_NONE),
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})
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def test_pin_layout_oe(self):
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layout_1 = pin_layout(1, dir="oe", xdr=2)
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self.assertLayoutEqual(layout_1.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((1, False), DIR_NONE),
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"o1": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="oe", xdr=2)
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self.assertLayoutEqual(layout_2.fields, {
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((2, False), DIR_NONE),
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"o1": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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def test_pin_layout_io(self):
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layout_1 = pin_layout(1, dir="io", xdr=2)
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self.assertLayoutEqual(layout_1.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((1, False), DIR_NONE),
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"i1": ((1, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((1, False), DIR_NONE),
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"o1": ((1, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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layout_2 = pin_layout(2, dir="io", xdr=2)
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self.assertLayoutEqual(layout_2.fields, {
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"i_clk": ((1, False), DIR_NONE),
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"i0": ((2, False), DIR_NONE),
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"i1": ((2, False), DIR_NONE),
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"o_clk": ((1, False), DIR_NONE),
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"o0": ((2, False), DIR_NONE),
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"o1": ((2, False), DIR_NONE),
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"oe": ((1, False), DIR_NONE),
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})
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class PinTestCase(FHDLTestCase):
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def test_attributes(self):
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pin = Pin(2, dir="io", xdr=2)
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self.assertEqual(pin.width, 2)
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self.assertEqual(pin.dir, "io")
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self.assertEqual(pin.xdr, 2)
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