12 commits

Author	SHA1	Message	Date
whitequark	3083c1d6dd	hdl.dsl: accept (but warn on) cases wider than switch test value. ... Fixes #13.	2019-01-13 08:46:28 +00:00
William D. Jones	2412650f56	hdl.dsl: Support Assert and Assume where an Assign can occur.	2019-01-02 11:17:39 +00:00
whitequark	470d66934f	hdl.dsl: add support for fsm.ongoing().	2018-12-27 16:19:01 +00:00
whitequark	35a44f017f	hdl.dsl: forbid m.next= inside of FSM but outside of FSM state, too.	2018-12-26 12:42:43 +00:00
whitequark	934546e633	hdl.dsl: provide generated values for FSMs.	2018-12-26 12:39:05 +00:00
whitequark	597d778cf6	examples: add an FSM usage example (UART receiver).	2018-12-26 10:10:27 +00:00
whitequark	72039b6072	hdl.dsl: add signal decoder to FSM state signal.	2018-12-26 09:45:12 +00:00
whitequark	54e3195dcb	hdl.dsl: implement FSM.	2018-12-26 08:55:04 +00:00
whitequark	8d1639a5a8	hdl, back: add and use SignalSet/SignalDict.	2018-12-17 17:21:29 +00:00
whitequark	015998eba9	hdl.dsl: add clock domain support.	2018-12-16 23:51:24 +00:00
whitequark	b2f828387a	hdl.dsl: cleanup. NFC.	2018-12-16 23:44:00 +00:00
whitequark	790eb05a92	Rename fhdl→hdl, genlib→lib.	2018-12-15 14:25:31 +00:00

Renamed from nmigen/fhdl/dsl.py (Browse further)